1. Technical Field
Exemplary embodiments of the present invention relate generally to a supply voltage/frequency control scheme and, more particularly, to a device controlling supply voltage/frequency using information of production process variations of a semiconductor and methods thereof.
2. Discussion of Related Art
As the technology of communication has developed, mobile systems, such as a mobile phone, a personal digital assistant (PDA), a moving picture mobile phone, or a notebook computer have become more and more important. Once a battery is fully charged, possible continuous operation time, that is, displaying how long the battery can be used, is one of the most important performance standards in a mobile system. Also, reducing power consumption of the mobile system has become one of the most important factors in designing a Very-Large-Scale Integration (VLSI) system or System on Chip (SoC).
More specifically, as a VLSI system or Sac is designed for high performance and high integration, power consumption of the VLSI system or the SoC rapidly increases, but on the other hand battery capacity or possible successive operation time is not increased as much as the power consumption. Therefore, it is a trend that the technique of reducing power consumption of the VLSI system or SoC, rather than an improvement of a battery itself, is studied as a priority.
High power consumption in a VLSI system or SoC may lower the performance of the VLSI system or the SoC by generating a lot of heat in the VLSI system or the SoC. Power consumption of a general VLSI system or SoC is mostly dynamic power consumption of a complementary metal-oxide-semiconductor (CMOS) circuit, which is embodied in the VLSI system or the Sac, and presented as the power consumption, Pd∝CLVDD2fp.
Here, CL is the load capacitance of the CMOS circuit, VDD is a supply voltage, and fp means a number of cycles or the operating frequency at which a predetermined program is performed. Since the power consumption Pd is proportional to the square of the supply voltage VDD, it is very efficient to lower the supply voltage VDD for reducing the power consumption.
FIG. 1 is a graph that displays the relationship between supply voltages and maximum operable frequencies. Referring to FIG. 1, when the supply voltage supplied to the VLSI system or Soc becomes lower, the maximum operable frequency of the VLSI system or the SoC also decreases. In other words, if the supply voltage supplied to VLSI system or Soc becomes lower, the calculation speed of the VLSI system or the Soc falls. Accordingly, a dynamic voltage scaling (DVS) scheme (or method), which can reduce power consumption of the VLSI system or the Soc while avoiding a decline of calculation speed of the VLSI system or the SoC, is extensively applied to the VLSI system or the SoC.
Operational speed of the CMOS circuit embodied in the VLSI system or the SoC is influenced by the maximum operable frequency, temperature, leakage current, or production process variations, and so on.
FIG. 2 is a graph illustrating the relationship between supply voltages and maximum operable frequencies according to a process variation. Referring to FIG. 2, maximum operable frequency (or operational speed) of a processor, for example, a CPU, according to a production process variation has a bigger variation range than that of a processor, for example, a CPU, according to a temperature variation. Also, referring to FIG. 2, when a supply voltage is low, the variation range of maximum operable frequency of the processor depending on temperature is not large.
Accordingly, when deciding upon a supply voltage supplied to a VLSI system or SoC, a process variation occurring in a production process of producing the VLSI system or the SoC is much more important than temperature variation of the VLSI system or the SoC. Therefore, it is required to have a device or method, which can control a supply voltage/frequency, or clock frequency, reflecting the maximum process variation occurring in a process of producing the VLSI system or Soc.